In the packaging of integrated circuits, dies may be packaged onto a package substrate (sometimes referred to as a laminate substrate), which includes metal connections that may route electrical signals between opposite sides of the laminate substrate. The dies may be bonded onto one side of a laminate substrate using flip chip bonding, and a reflow is performed to melt the solder bumps that interconnect the dies and the laminate substrate.
The laminate substrates may use materials that can be easily laminated. These materials, however, are prone to the warpage caused by the elevated temperature during the reflow of the solder bumps. The warpage may cause irregular joints and/or bump cracks, and lead to poor assembly yield. Conventionally, to reduce the warpage of a laminate substrate, jigs may be used to press the laminate substrate from both sides. The jigs may include a lower jig and an upper jig. The upper jig typically has a grid pattern with openings therein, and the laminate substrate is sandwiched between the lower jug and the upper jig. Portions of the laminate substrate are exposed through the openings in the upper jig. Dies are bonded to the laminate substrate through the openings.
The jigs, however, also introduce problems. For example, the laminate substrates typically have coefficients of thermal expansion (CTEs) different from the CTEs of the jigs. Therefore, although the laminate substrates are smooth before the reflow, during the reflow process of the bonding, the elevated temperature causes the laminate substrates and the jigs to have different expansion lengths. Although precaution may be taken to reduce the warpage of the laminate substrates during the reflow, the warpage may still occur after the reflow.